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  1. A suitable Vivado Design Suite is required for this tutorial. The WebPACK edition can be used if your board is supported.
  2. The µC/OS BSP. The BSP is distributed with the full source code of µC/OS-III for evaluation purpose. See installation instructions for setup.

AMP Setup

The AMP setup used in this tutorial uses the Zynq-7000 PS core 0 as a master running the uC/OS RTOS. Core 1 is configured as a slave processor. Communication between both processors requires three different shared memory region. Namely the transmit and receive vrings as well as a shared memory region for control information. The transmit and receive rings can and should usually be located in cacheable main memory for maximum performance. The shared memory region, called SHMEM in the configuration must be located in coherent memory. All of the main memory of the ARM cores of the Zynq-7000 are coherent by default and we'll place the SHMEM region in main memory.